When it is desired to centralizedly control presses, machine tools, construction machines, ships, airplanes, unmanned transportation machines or unmanned storehouses, a multiplicity of sensors for detecting states of the respective machines and a multiplicity of actuators for controlling the states of the respective machines are required. In the case where such a controller is applied to presses, for example, the number of such sensors and actuators amounts to more than 3000, and in the case of other machines, the number becomes larger than 3000.
There has been proposed a centralized control system for centralizedly controlling such sorts of machines, in which a plurality of nodes are connected in series and one or a plurality of sensors and one or a plurality of actuators are connected to each of the nodes and are also connected to a main controller in the form of a ring so that a signal issued from the main controller causes the respective nodes to be controlled.
in the case where the nodes are arranged to be connected in series in this way, how to secure the simultaneousness of outputs of the respective sensors and the simultaneousness of outputs of the respective actuators become important. For example, when such an arrangement is employed that addresses are allocated to the respective nodes to control the nodes on the basis of the addresses, a time delay caused by this address processing becomes a problem and it becomes impossible to secure the satisfactory simultaneousness of collection of outputs of the sensors and of the control of the actuators.
To avoid this, the inventors of the present application have proposed a serial controller in which nodes are connected in series, no addresses are allocated to the respective nodes and instead the nodes are identified by their connection order, whereby the need for the address processing can be eliminated, the problem of the time delay caused by the address processing can be solved, and the configuration of the nodes can be remarkably simplified.
Such a serial controller is arranged as shown in FIG. 1. In the drawing, a main controller 100 performs general control over respective machines to be managed, groups of sensors 1-1, 1-2, . . . , and 1-N are connected to the respective machines to detect the states of the machines, and groups of actuators 2-1, 2-2, . . . , and 2-N controllably drive the respective machines in its arrangement, the sensor groups 1-1 to 1-N and the actuator groups 2-1 to 2-N are connected to nodes 10-1 to 10-N respectively, and the nodes 10-1 to 10-N are connected in series with the main controller 100 to form a loop including the main controller.
in the operation of the system, signals indicative of the states of the machines issued from the respective sensors 1-1, 1-2, . . . , and 1-N are sent through the nodes 10-1, 10-2, . . . , and 10-N to the main controller 100 to collect and process the received signals at the main controller; whereas signals for driving of the respective actuators 2-1, 2-2, . . . , and 2-N are generated at the main controller 100 and then sent to the respective actuators 2-1, 2-2, . . . , and 2-N to drive the actuators 2-1, 2-2, . . . , 2-N.
FIG. 2 shows the fame structure of a data frame signal used in the system when the number N of nodes is 5. The data frame signal is issued from the main controller 100, passed through the nodes 10-1, 10-2, . . . , and 10-N and then returned back to the main controller 100. Part (a) of FIG. 2 shows the data frame signal immediately after issued from the main controller 100, Parts (b), (c), (d) and (e) of FIG. 2 show the data frame signals after issued from the nodes 10-1, 10-2, 10-3 and 10-4 respectively, and Part (f) of FIG. 2 shows the data frame signal (to be fed back to the main controller 100 when N=5) after issued from the node 10-5.
The contents of the respective signals having the frame structures of FIG. 2 are as follows,
STI; First start code indicative of the heading position of input data (sensor data) DI PA1 DI; input data PA1 DIq; input data from a sensor connected to the q-th node PA1 STO; Second start code indicative of the heading position of output data (actuator drive data) PA1 DO; Output data (actuator drive data) PA1 DOq; Output data to the actuator connected to the q-th node PA1 SP; Stop code indicative of the terminating end position of a data string PA1 CRC; Code (indicative of error contents) for CRC error check at the respective nodes PA1 ERR; Code indicative of error content and position
The respective nodes 10-1 to 10-N shown in FIG. 1 operate to add the detection data DI of the sensors 1 connected to the node to between the start codes STI and STO and to remove the output data DO to the actuators 2 connected to the associated nodes from the output data immediately after the start codes STO respectively, as shown in Parts (b) to (f) of FIG. 2.
Accordingly, in this system, when such a data frame signal containing the actuator control data DO as shown in Part (a) of FIG. 2 is sent from the main controller 100 to the node 10-1, the data frame signal is sequentially propagated from the node 10-1 via the nodes 10-2, 10-3, 10-4 and to the node 10-5, which results in that the actuator control data DO in the data frame signal are allocated to the corresponding nodes and at the same time the detection data of the sensor group obtained at the respective nodes are taken into the data frame signal. As a result, when the data frame signal is fed back to the main controller 100, no actuator control data DO are contained in the frame signal and only the detection data of the sensor group are contained in the frame signal as shown in Part (f) of FIG. 2.
With the above arrangement, conventionally, the send period (which is a time from the send start time of one data frame signal to the send start time of the next data frame signal, which will be referred to as the "sampling time", hereinafter) of the data frame signal is set to be always constant in and system regardless of the scale of the system, that is, regardless of the number of sensors and the number of actuators in the system. And the constant sampling time is usually set to be suitable for a system having the maximum sensor number and the maximum actuator number. For this reason, the prior art system has had a problem that a system having a less number of sensors and a less number of actuators provides a longer interval time between one data frame signal and the next one with a lower data transmission efficiency and with deteriorated real time controllability. Further, the prior art system has been disadvantageous in that, since the output data length of the data frame signal is set according to one of the systems having the maximum actuator number independently of the scale of the system, a system having a less number of actuators provides a lower data transmission efficiency with deteriorated real-time controllability.
With the above system, when the system is started by turning ON its power supply, the main controller 100 generates such an initial frame signal as shown in FIG. 3 and sends it to the nodes to detect an input point number (the number of all bits for the sensor groups 1- 1 to 1-N) and an output point number (the number of all bits for the actuator groups 2-1 to 2-N). Like the data frame signal shown in FIG. 2, the initial frame signal comprises a first start code STI, a second start code STO, output point number detection data DO', a stop code SP, a CRC code and an ERR code. In this connection, the output point number detection data DO' consists of "0s" of A bits to prevent the operation of the actuators at each node, where symbol A is set to be a number larger than the number B of all actuators used in this system.
Like the data frame signal already explained earlier, the initial frame signal is sequentially propagated to the nodes 10-1, 10-2, 10-3, 10-4 and 10-5, through which the output point number detection data DO' in the initial frame signal is allocated to the corresponding node and detection data of the sensor group obtained at the respective nodes are included into the initial frame signal. More specifically., at each of the respective nodes 10-1, 10-2, . . . , and 10-N, the data DI of associated one of the sensor groups 1-1, 1-2, . . . , and 1-N connected to the associated node is attached to the end of the first start code STI of the received initial frame signal, and data on associated one of the actuator groups 2-1, 2-2, . . . , and 2-N connected to the associated node is extracted from the output point number detection data DO' following the second start code STO.
Then, the initial frame signal, which is passed through the nodes 10-1, 10-2, . . . , and 10-(N-1) and issued from the node 10-N, is sent to the main controller 100 in the form of a signal having such a structure as shown in FIG. 4.
The main controller 100 counts the number E of bits in the data DI following the first start code SRI of the received initial frame signal, finds an input point number on the basis of its count result, counts the number C of bits in the data DO following the second start code 5TO of the received initial frame signal, subtracts the count value C from the bit number A of the output point number detection data DO' of the initial frame signal of FIG. 3 when issued, and finds an output point number from its subtraction result B (=A-C). And the main controller 100 determines the length of the actuator driving data DO in the usual data frame signal of FIG. 2 on the basis of the calculated output point number B.
That is, in this system, when the data A larger than the anticipated output point number B is output, the data A, as passed through the nodes, is removed by a number corresponding to the output point number B and thus data C (=A-B) is sent to the main controller 100. As a result, thereafter, the output point number B can be found by subtracting the count-down result C from the value A as a minuend (A-C).
Meanwhile, in the prior art system, for the subtraction processing of finding the above output point number B, a usual full adder circuit comprising a general purpose LSI which performs the adding operation based on a principle that 1's complement on a subtrahend is added to a minuend has been employee. In this system, in spite of the fact that even the full adder circuit itself is large in circuit scale, the number of circuits has been extremely large, because the input/output point numbers usually amount to thousands of bits.
in the aforementioned system, further, the main controller 100 issues the data frame signal of FIG. 2 with a predetermined sampling period as shown in FIG. 5 (b), the respective nodes sequentially judge whether or not a predetermined time (which will be referred to as the broken-line detection time, hereinafter) has elapsed from the reception of the previous frame signal and when detecting the passage of the broken-line detection time, detect the generation of a broken line. More specifically, when a line between the nodes 10-2 and 10-3 is broken as shown in FIG. 5(a), the node 10-3, even when the broken-line detection time elapses after the reception of the previous data frame signal, fails to receive the next data frame signal and thus can detect a generation of the broken line. In the prior art system, the above broken-line detection time is set by means of hardware such as dip switches respectively depending on the scale and response property of the serial controller.
Though the above broken-line detection time is determined by the scale and response property of the system as mentioned above, it is required to be determined basically by the sampling period of the data frame signal. In other words, when the system of FIG. 5(a) is employed for example, the sampling period becomes small because the node number is as small as 3, which results in that it is necessary to also set the broken-line detection time to be short. This is because the setting of a large broken-line detection time for a small sampling period causes the system to be put in an uncontrollable state caused by the broken line for a long time, whereby the safety of the system is deteriorated.
On the contrary, when the number of nodes is large, the sampling period becomes large and thus the broken-line detection time also must be set to be correspondingly large. In other words, when a small broken-line detection time is set for a long sampling period, only a failure in the reception of the data frame signal corresponding to one frame due to a simple communication error undesirably results in the system erroneously detect it as the generation of a broken line.
With the prior art system, further, since the broken-line detection time is set on a hardware basis as mentioned above, not only its setting is troublesome but also a setting error might cause a trouble.
In view of such circumstances, it is an object of the present invention to provide a serial controller which can realize data transmission with a good transmission efficiency at all times regardless of the scale of the system.
Another object of the present invention is to provide a controller which can effect a predetermined binary subtraction with a less number of circuits.
A further object of the present invention is to provide a controller which can automatically set a broken-line detection time optimum according to the period of a frame signal easily while preventing generation of any troubles.